Initialize

read SR1 register

read SR2 register

set PE bit on CR register (must be initialized two times, as describe in datasheet)

set PE and ITE bit on CR register (allow interrupts and I2C)

set 0x7f on CCRregister (max clock divider)

set 0 on OAR2 (freq CPU<6Mhz)

clear ACK, START, STOP bit in CR register







   Start communication

set packet_idx to 0

launch initialize function

set START bit in CR register







   interruption (vector 12)

if EVF bit in SR1 is set (event happened)

{

  if SB is set in SR1 is set (start bit correctly generated)

  {

    copy SR1 register in a buffer variable (clean SR1)

    copy adress + read/write bit in DR register

  }

  else

  {

    if BTF bit in SR1 is set (packet correctly transmitted)

    {

      if state is writing (internal variable)

      {

        if packet_idx < qtty of data

        {

          read SR1 register in a useless buffer

          copy data buffer at position packet_idx into DR register

          increase packet_idx

        }

        else

        {

          set bit STOP in CR

          unset bit PE in CR (disable the device)

        }

      }

      else

      {

        if packet_idx < qtty of data - 1

        {

          set ACK bit in CR

          read SR1 in an useless buffer

          read DR in the data buffer

          increase packet_idx

        }

        else

        {

          set STOP bit in CR

          unset PE bit in CR (disable the device)

          read DR in the data buffer

        }

      }

    }

    else (note : this case happen only in receive, and after the transmit of adress)

    {

      set ACK bit in CR register (if i don't do this ack, slave don't transmit anymore)

      read SR1 in an useless buffer

      set PE in CR register (already set, but it is specified in datasheet that's the only way to clean this interrupt)

    }

    if BERR, AF or ARLO bit in SR2 is set

    {

      clear Pe bit in CR

    }

  }

}